Wednesday, 26. March 2003
Topic: COMPUTER - on March 26, 2003 at 12:17:56 PM CET
United States Patent: 6,535,988
System for detecting over-clocking uses
a reference signal thereafter preventing over-clocking by reducing clock rate.
Abstract
An over-clock deterrent mechanism of a chipset which comprises an over-clock detection circuit for detecting over-clocking of a system (processor) clock signal based on comparison of ratio of the system (processor) clock signal which is likely to be over-clocked and a fixed, stable reference clock signal which is highly unlikely to be over-clocked, and an over-clock prevention (thwarting) circuit for deterring such an over-clocking by either disabling operations of a computer system or significantly undermining key operations of a computer system.
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